Along with the industry experience, I worked on several hands on projects as a hobby and also funded by the college being an electronic hobbyist. There are several big and small projects and also some as a part of the college research that I directly have hands on experience with. A detailed view on the projects are mentioned below.
Role: Research assistant (January 2019 - September 2019)
NASA based project where I was responsible for the development of hardware and GUI for a space-based metal 3D printer called M3AM along with the research team of Interlog. This involved several tasks like GUI design, G code, CAD Visualization, and several analysis procedures for the printer. The project was done in 2 phases. The first phase included a raw implementation
Phase 1
The second phase included a much cleaner implementation in terms of GUI and working.
Phase 2
Live Data Tracking from a racing vehicle:
Role: Electronic Race Engineer at Team Stradale (February 2017 - April 2017)
Funded by Team Stradale company, This R&D project includes an inexpensive way of tracking data from the race vehicles on track from Pit lane. It involves live monitoring of the performance of the vehicle getting data from several sensors and engine to compare and analyze the performance of the car and the driver on track. This project was achieved using cheap electronics like the raspberry pi and its modules and the software like AIM Race studio and Life data.
Custom developed board with Raspberry pi for live data tracking
Role: Technical head of robotics club (April 2015)
Hap-tic proximity module is a complete Research and Development based project that has a basic idea of giving artificial senses to a physically handicapped person in terms of any kind of limb challenges. The main idea is to give the physically challenged an artificial limb that senses the action to be performed and adapts itself to the motion required.
Phase 1
Phase 2
Formula student Based Racing Vehicle:
Role: Electronics head and designated driver (2015)
A Formula student-based racing vehicle towards an event organized by the SAE. It involves the teamwork of different branch students starting from design to simulation to real time implementation. Anything involved between design, fabrication and driving for the competition.
Team behind the project
Final shakedown video
IOT Classroom:
Role: Electronics Head (2015)
With Internet of things being the future, we developed a smart classroom as a part of event organized by IBM called IBM hackathon all over India to digitize the interaction between the teacher and a student. Won 1st place at National level organized by IBM India.
Demonstration of the project
LED Matrixing:
Role: Electronics Head (2015)
LED Matrixing is a 3D visual based project. The basic concept of this project is to divide an image into 3 dimensional pixels. It is an 8*8*8 LED cube consisting of 512 LEDs or 512 pixels. These 512 LEDs are controlled using an Atmel micro-controller called the Atmega 16. Using the timing based coding, different letters, numbers, patterns can be displayed in the 3 dimensional structure. The 512 LEDs were controlled only using 24 outputs further using decoders and multiplexers and latches
Demo of LED Matrix
Go karting championship:
Role: Electronics Head (2014)
This project involved design and manufacture of a go karting vehicle and presenting it in front of international judges. The role i played in the project is to lead the electronic team with several challenges put up by the constructors of the competition in the field of electronics.
Semi-Humanoid Robot:
Role: Head (2014)
A semi humanoid robot is a project based on a robot that has the characteristics of a human with semi-autonomous control. The project involves a mechanical design of a 5 feet human look alike robot that walks stands and performs tasks like a human being. The main purpose of this project is to give the defense a very strong life less man force that could reduce the life risk.
Hexcopter:
Role: Head (2013)
Hex copter consists of 6 motors and 6 arms that have a counter and clock oriented rotation keeping the pod stable with the help of automated gyro and accelerometer sensors equipped with an electronic speed controller. The Hex copter designed can bear a payload of 2 Kgs and can fly to a height of 1500 feet with the maximum being 50,000 RPM. This also is equipped with a GPS feature which automatically gives the positioning and the heading direction of the drone.
Demonstration of Hexcopter
Virtually Controlled Machine:
Role: Head (2012)
Control of any machine with the virtual motion of a human being. Detecting the actual motion of a human being, The device can be programmed to do tasks based on the gestures given virtually
Demonstration of Virtually controlling a machine
Academic projects:
·System Setup for Networking-On-Chip Prototyping:
Role: Academic
Project (March 2016)
Network-on-Chip (NoC) is
a promising communication mechanism for future Multi-Processor System-on-Chip
(MPSoC) systems. The objective of this project is to setup the simulation
environment for SystemC and to understand the behaviors of NoC routers and
processing elements (PEs). Then finally evaluate a model that computes 8 point
Discrete Fourier Transform using Fast Fourier Transform following a
well-designed design flow.
Register Transfer Level
Power Reduction:
Role: Academic
Project (February 2016)
Clock Gating (CG)
technique, one of the most effective ways to reduce power at RTL, with a real
industry RTL sub-block for Mobile Multimedia Processor (MMP) design. Modified
the Verilog RTL source code, conducted formal verification by using Synopsys
Formality to verify the modification and perform synthesis and power estimation
by using Synopsys Design Compiler and Power Compiler.
System Level Power
Reduction using WATTCH:
Role: Academic
Project (February 2016)
The power consumption in
an architecture implementing sorting algorithms can be optimized using a system
level power reduction using loop unrolling technique. “WATTCH” is an
architectural simulator that estimates CPU power consumption. The power
estimation is based on a suite of parameterizable power models for different
hardware structures and on per cycle resource usage counts generated through
cycle level simulation.
32-bit Pipelined CPU
design with New ALU Architecture:
Role: Academic
Project (November 2015)
The operation of the
circuit is synchronized by an externally set clock signal. The instruction
signals for addressing the memory file, selecting the Arithmetic Logic Unit
(ALU) operands and specifying the operation of the ALU are provided externally.
The correct synchronization of those signals with the critical data path delay
of the circuit that will determine the minimum operating period is one of the
objectives of the project. The other objective was to add a comparator design
and create a new ALU design and execute the instructions given. Finally, the
timing and power analysis has to be made.
Standard Cell based ASIC
design flow:
Role: Academic
Project (October 2015)
The art of changing a
circuit description, usually written in a hardware description language into a
layout is a complex procedure that involves many steps, which are usually
called collectively as a design flow. In this project one of the most popular
design flows, the standard cell based ASIC design flow was implemented using
tools and libraries from various vendors including OSU standard cell library,
Synopsys Design Compiler, Synopsys Formality, Cadence Encounter Digital
Implementation System and Cadence Virtuoso.
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